Semiconductor Packaging in China: Advanced OSAT and Chip Packaging Technology
While China's domestic chip manufacturing faces significant challenges from US export controls, the country's semiconductor packaging and OSAT (Outsourced Semiconductor Assembly and Test) sector has emerged as a global competitive strength. China is home to three of the world's top 10 OSAT companies: JCET (长电科技), Tongfu Microelectronics (通富微电), and TFME (天水华天). Together, these companies process billions of chips annually using advanced packaging technologies including fan-out wafer-level packaging (FOWLP), 2.5D/3D packaging, and chiplet integration. As Moore's Law slows, advanced packaging has become increasingly critical for improving chip performance, making China's OSAT strength a strategic asset.
TL;DR
China dominates global OSAT with 3 of the top 10 companies (JCET, Tongfu, TFME), leveraging advanced packaging technologies like FOWLP and 2.5D/3D to compensate for chip manufacturing limitations.
Key Insights
JCET (长电科技)
JCET is China's largest and the world's third-largest OSAT company by revenue, with 2024 revenue exceeding $4.5 billion. The company operates manufacturing facilities across China, Singapore, and South Korea. JCET offers advanced packaging services including fan-out wafer-level packaging, 2.5D interposer, system-in-package (SiP), and chiplet integration. The company has invested heavily in high-density fan-out and advanced die-attach technologies for high-performance computing and AI chip applications.
Tongfu Microelectronics
Tongfu Microelectronics (通富微电) is a major Chinese OSAT and a key packaging partner for AMD, handling assembly and test for AMD's Ryzen processors and other products. The company has benefited from AMD's growing market share and has invested in advanced packaging capabilities including flip-chip, 2.5D, and fan-out technologies. Tongfu operates facilities in Suzhou, Nantong, Penang (Malaysia), and a joint venture fab with AMD in Suzhou focused on advanced packaging.
TFME (天水华天)
Tianshui Huatian Technology (TFME) ranks among the world's top 6 OSAT companies with manufacturing facilities in Gansu, Xi'an, Kunshan, and overseas. The company provides traditional and advanced packaging services including wafer-level packaging (WLP), flip-chip, and system-in-package. TFME has been expanding its advanced packaging capabilities, particularly for image sensors, power devices, and memory applications. The company serves major international and domestic chip companies.
Advanced Packaging Technologies
Chinese OSAT companies have made significant progress in advanced packaging technologies. JCET has developed high-density fan-out packaging supporting over 1,000 I/Os, while Tongfu is investing in 2.5D interposer technology for AI accelerators. China is also developing domestic chiplet standards and platforms to enable modular chip design. These technologies are increasingly important as chip manufacturing becomes constrained by physics and geopolitics, with packaging offering a path to improved performance without requiring advanced manufacturing nodes.
Market Share
Chinese OSAT companies collectively hold approximately 38% of the global OSAT market by revenue, making China the dominant player in chip packaging. This market position is expected to strengthen as semiconductor companies increasingly rely on advanced packaging to improve performance. China's OSAT industry benefits from proximity to domestic fabless companies, cost advantages, and strong government support under the national semiconductor development plan.
US Export Controls Impact
US export controls have had limited direct impact on China's OSAT industry because packaging equipment and materials face fewer restrictions than manufacturing equipment. However, advanced packaging tools from companies like Applied Materials and Kulicke & Soffa could face future restrictions. Chinese OSAT companies are diversifying their equipment supply chain and developing domestic alternatives for packaging materials, bonding tools, and test equipment.
Side-by-Side Comparison
| Company | Country | Rank | Revenue (2024) | Key Strengths |
|---|---|---|---|---|
| ASE Group | Taiwan | #1 | $20B+ | Largest scale, full-service |
| Amkor | US | #2 | $6.5B | Advanced SiP, automotive |
| JCET | China | #3 | $4.5B | Fan-out, 2.5D, chiplets |
| SPIL (Powertech) | Taiwan | #4 | $4B+ | Memory packaging, testing |
| TFME | China | #5-6 | $3.5B | WLP, image sensors |
| Tongfu | China | #5-6 | $3.5B | AMD partnership, 2.5D |
| STS | Singapore | #7 | $2.5B | Test services |
| Carsem | Malaysia | #8 | $2B+ | Leadframe, automotive |
Frequently Asked Questions
As Moore's Law slows and advanced manufacturing nodes (3nm, 2nm) become exponentially more expensive, advanced packaging offers a cost-effective way to improve chip performance. Technologies like 2.5D/3D packaging allow multiple chiplets to be combined, effectively achieving the performance of a single large chip at lower cost. This is especially relevant for AI accelerators and high-performance computing where packaging innovation can deliver significant performance gains without requiring the most advanced manufacturing nodes.
Currently, US export controls have limited direct impact on Chinese OSAT companies because packaging equipment and materials are less restricted than advanced lithography and etching equipment. However, this could change if the US expands restrictions to include advanced packaging tools. Chinese OSAT companies are already working to develop domestic alternatives for critical packaging equipment and materials to reduce this risk. The strategic importance of packaging is growing precisely because it offers a path forward even if manufacturing is constrained.
Traditional chip packaging (wire bonding, leadframe) connects a die to a substrate using thin wires, with limited I/O density and performance. Advanced packaging includes technologies like flip-chip (solder bumps replacing wires), fan-out wafer-level packaging (redistributing I/Os across a larger area), 2.5D interposer (placing multiple dies on a silicon interposer), and 3D stacking (vertically stacking dies). Advanced packaging enables higher I/O density, better electrical performance, smaller form factors, and multi-chip integration.